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Advance Data Sheet
A m p l i fy t h e H u m a n E x p e r i e n c e
Comlinear CLC1011, CLC2011, CLC4011
(R)
Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
FEATURES n 136A supply current n 4.9MHz bandwidth n Output swings to within 20mV of either rail n Input voltage range exceeds the rail by >250mV n 5.3V/s slew rate n 21nV/Hz input voltage noise n 16mA output current n Fully specified at 2.7V and 5V supplies n CLC1011: Pb-free SOT23-5, SC70-5, SOIC-8 n CLC2011: Pb-free SOIC-8, MSOP-8 n CLC4011: Pb-free SOIC-14. TSSOP-14 APPLICATIONS n Portable/battery-powered applications n PCMCIA, USB n Mobile communications, cell phones, pagers n ADC buffer n Active filters n Portable test instruments n Notebooks and PDA's n Signal conditioning n Medical Equipment n Portable medical instrumentation
General Description
The COMLINEAR CLC1011 (single), CLC2011 (dual), and CLC4011 (quad) are ultra-low cost, low power, voltage feedback amplifiers. At 5V, the CLCx011 family uses only 160A of supply current per amplifier and are designed to operate from a supply range of 2.5V to 5.5V (1.25 to 2.75). The input voltage range exceeds the negative and positive rails. The CLCx011 family of amplifiers offer high bipolar performance at a low CMOS prices. They offer superior dynamic performance with 4.9MHz small signal bandwidths and 5.3V/s slew rates. The combination of low power, high bandwidth, and rail-to-rail performance make the CLCx011 amplifiers well suited for battery-powered communication/computing systems
Typical Performance Examples
Large Signal Frequency Response
V s = 5V V o = 1Vpp
Output Swing vs. Load
1.35
R L = 10k R L = 1k
Output Voltage (0.27V/div)
Magnitude (1dB/div)
0
R L = 75 R L = 100 R L = 200 R L = 75/100
V o = 4Vpp V o = 2Vpp
-1.35
0.01
0.1
1
10
-2.0
0
2.0
Frequency (MHz)
Input Voltage (0.4V/div)
Ordering Information
Part Number CLC1011ISC5X* CLC1011IST5X* CLC2011ISO8X* CLC2011IMP8X* CLC4011ISO14X* CLC4011ITP14X* Package SC70-5 SOT23-5 SOIC-8 MSOP-8 SOIC-14 TSSOP-14 Pb-Free Yes Yes Yes Yes Yes Yes RoHS Compliant Yes Yes Yes Yes Yes Yes Operating Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Packaging Method Reel Reel Reel Reel Reel Reel
Rev 0.0.1
Moisture sensitivity level for all parts is MSL-1. *Advance Information.
(c)2009 CADEKA Microcircuits LLC
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Advance Data Sheet
CLC1011 Pin Configuration
CLC1011 Pin Assignments
Pin No. 1 2 3 4 5 Pin Name OUT -VS +IN -IN +VS Description Output Negative supply Positive input Negative input Positive supply
OUT -V S +IN
1 2 3 +
5
+VS
4
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
-IN
CLC2011 Pin Configuration
CLC2011 Pin Configuration
Pin No. 1 Pin Name OUT1 -IN1 +IN1 -VS +IN2 -IN2 OUT2 +VS Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 Negative supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Positive supply
OUT1 -IN1 +IN1 -V S
1 2 3 4
8 7 6 5
+VS OUT2 -IN2 +IN2
2 3 4 5 6 7 8
CLC4011 Pin Configuration
CLC4011 Pin Configuration
Pin No. 1 2 Pin Name OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT2 OUT3 -IN3 +IN3 -VS +IN4 -IN4 OUT4 Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 Positive supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Output, channel 3 Negative input, channel 3 Positive input, channel 3 Negative supply Positive input, channel 4 Negative input, channel 4 Output, channel 4
OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT2
1 2 3 4 5 6 7
14 13 12 11 10 9 8
OUT4 -IN4 +IN4 -VS +IN3 -IN3 OUT3
3 4 5 6 7 8 9 10 11 12 13 14
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
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2
Advance Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the "Absolute Maximum Ratings". The device should not be operated at these "absolute" limits. Adhere to the "Recommended Operating Conditions" for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots.
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Parameter Supply Voltage Input Voltage Range Continuous Output Current
Min 0 -Vs -0.5V -30
Max 6 +Vs +0.5V 30
Unit V V mA
Reliability Information
Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 5-Lead SC70 5-Lead SOT23 8-Lead SOIC 8-Lead MSOP 14-Lead SOIC 14-Lead TSSOP
Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Min -65
Typ
Max 175 150 260
Unit C C C C/W C/W C/W C/W C/W C/W
TBD TBD TBD TBD TBD TBD
ESD Protection
Product Human Body Model (HBM) Charged Device Model (CDM) SC70-5 TBD TBD SOT23-5 TBD TBD SOIC-8 TBD TBD MSOP-8 TBD TBD SOIC-14 TBD TBD TSSOP-14 TBD TBD
Recommended Operating Conditions
Parameter Operating Temperature Range Supply Voltage Range Min -40 2.5 Typ Max +85 5.5 Unit C V
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
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Advance Data Sheet
Electrical Characteristics at +2.7V
TA = 25C, Vs = +2.7V, Rf = Rg =5k, RL = 10k to VS/2, G = 2; unless otherwise noted.
Symbol
UGBWSS BWSS BWLS GBWP tR, tF OS SR HD2 HD3 THD en VIO dVIO Ib dIb PSRR AOL IS RIN CIN CMIR CMRR
Parameter
Unity Gain -3dB Bandwidth -3dB Bandwidth Large Signal Bandwidth Gain Bandwdith Product Rise and Fall Time Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Voltage Noise Input Offset Voltage (1) Average Drift Input Bias Current (1) Average Drift Power Supply Rejection Ratio (1) Open-Loop Gain Supply Current
(1)
Conditions
G = +1, VOUT = 0.02Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp G = +11, VOUT = 0.2Vpp VOUT = 1V step; (10% to 90%) VOUT = 1V step 1V step VOUT = 1Vpp, 10kHz VOUT = 1Vpp, 10kHz VOUT = 1Vpp, 10kHz > 10kHz
Min
Typ
4.9 3.7 1.4 2.2 163 <1 5.3 -72 -72 0.03 21
Max
Units
MHz
Frequency Domain Response
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
MHz MHz MHz ns % V/s dBc dBc % nV/Hz 6 420 mV V/C nA pA/C dB dB 190 A M pF V dB
Time Domain Response
Distortion/Noise Response
DC Performance
-6 0.5 5 90 32 DC VOUT = VS / 2 per channel Non-inverting 55 83 90 136 12 2 -0.25 to 2.95 DC 55 0.06 to 2.64 81 0.02 to 2.68 0.05 to 2.63 0.11 to 2.52 16
Input Characteristics
Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio (1)
Output Characteristics
RL = 10k to VS / 2 (1) VOUT Output Voltage Swing RL = 1k to VS / 2 RL = 200 to VS / 2 IOUT
Notes: 1. 100% tested at 25C
V V V mA
Output Current
Rev 0.0.1
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Advance Data Sheet
Electrical Characteristics at +5V
TA = 25C, Vs = +5V, Rf = Rg =5k, RL = 10k to VS/2, G = 2; unless otherwise noted.
Symbol
UGBWSS BWSS BWLS GBWP tR, tF OS SR HD2 HD3 THD en VIO dVIO Ib dIb PSRR AOL IS RIN CIN CMIR CMRR
Parameter
Unity Gain -3dB Bandwidth -3dB Bandwidth Large Signal Bandwidth Gain Bandwdith Product Rise and Fall Time Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Voltage Noise Input Offset Voltage (1) Average Drift Input Bias Current (1) Average Drift Power Supply Rejection Ratio (1) Open-Loop Gain Supply Current
(1)
Conditions
G = +1, VOUT = 0.02Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp G = +11, VOUT = 0.2Vpp VOUT = 1V step; (10% to 90%) VOUT = 1V step 1V step VOUT = 1Vpp, 10kHz VOUT = 1Vpp, 10kHz VOUT = 1Vpp, 10kHz > 10kHz
Min
Typ
4.3 3.0 2.3 2.0 110 <1 9 -73 -75 0.03 22
Max
Units
MHz
Frequency Domain Response
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
MHz MHz MHz ns % V/s dBc dBc % nV/Hz 8 450 mV V/C nA pA/C dB dB 235 A M pF V dB
Time Domain Response
Distortion/Noise Response
DC Performance
-8 1.5 15 90 40 DC VOUT = VS / 2 per channel Non-inverting 40 60 80 160 12 2 -0.25 to 5.25 DC 58 0.08 to 4.92 85 0.04 to 4.96 0.07 to 4.9 0.14 to 4.67 30
Input Characteristics
Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio (1)
Output Characteristics
RL = 10k to VS / 2 (1) VOUT Output Voltage Swing RL = 1k to VS / 2 RL = 200 to VS / 2 IOUT
Notes: 1. 100% tested at 25C
V V V mA
Output Current
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
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5
Advance Data Sheet
Typical Performance Characteristics
TA = 25C, Vs = +2.7V, Rf = Rg =5k, RL = 10k to VS/2, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V
Normalized Magnitude (1dB/div)
V o = 0.2Vpp G=2 R f = 5k
Inverting Frequency Response at VS = 5V
Normalized Magnitude (1dB/div)
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
G=1 Rf = 0
V o = 0.2Vpp R f = 5k R f = 5k
R f = 5k G=5 R f = 5k
R f = 5k R f = 5k
0.01
0.1
1
10
0.01
0.1
1
10
Frequency (MHz)
Frequency (MHz)
Non-Inverting Frequency Response
Normalized Magnitude (1dB/div)
V o = 0.2Vpp G=2 R f = 5k G=1 Rf = 0
Inverting Frequency Response
Normalized Magnitude (1dB/div)
R f = 5k G = -2
G = -1
R f = 5k G=5 R f = 5k
G = -10
G = -5
0.01
0.1
1
10
0.01
0.1
1
10
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. CL
V o = 0.05V CL R s = 100
Frequency Response vs. RL
Magnitude (1dB/div)
Magnitude (1dB/div)
CL R s = 0
RL = 1k
RL = 10k
CL R s = 0 CL R s = 0
+ 5k 5k Rs CL RL
RL = 200 RL = 50
0.01
0.1
1
10
0.01
0.1
1
10
Frequency (MHz)
Frequency (MHz)
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
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Advance Data Sheet
Typical Performance Characteristics
TA = 25C, Vs = +2.7V, Rf = Rg =5k, RL = 10k to VS/2, G = 2; unless otherwise noted. Frequency Response vs. VOUT
V s = 5V
Open Loop Gain & Phase vs. Frequency
140
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Magnitude (1dB/div)
Open Loop Gain (dB)
V o = 1Vpp
120 R L = 10k 100 80 60 40 20 0 -20
R L = 10k
V s = 5V No load
Open Loop Phase (deg)
0 -45 -90
No load
V o = 4Vpp V o = 2Vpp
-135 -180 10 4 10 5 10 6 10 7 10 8
0.01
0.1
1
10
10 0
10 1
10 2
10 3
Frequency (MHz)
Frequency (Hz)
2nd Harmonic Distortion vs. VOUT
-20 -30
3rd Harmonic Distortion vs. VOUT
-20 -30
Distortion (dB)
Distortion (dB)
-40 -50 -60 -70 -80 -90 0.5 1 1.5 2 2.5
50kHz 10kHz, 20kHz 10kHz 50kHz 100kHz
-40 -50 -60 -70
10kHz 100kHz 20kHz
50kHz
-80 -90 0.5 1 1.5 2 2.5
Output Amplitude (Vpp)
Output Amplitude (Vpp)
2nd & 3rd Harmonic Distortion
-20 -30
V o = 1Vpp R L = 200 R L = 1k R L = 200
Input Voltage Noise
55 50 45 40 35 30 25 20 15 10
R L = 10k R L = 1k
Distortion (dBc)
-40 -50 -60 -70 -80 -90 0
R L = 10k
nV/Hz
5 0
20
40
60
80
100
0.1k
1k
10k
100k
1M
Frequency (kHz)
Frequency (Hz)
Rev 0.0.1
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Advance Data Sheet
Typical Performance Characteristics - Continued
TA = 25C, Vs = 5V, Rf = Rg =150, RL = 150, G = 2; unless otherwise noted. CMRR
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 10 100 1000 10000 100000
PSRR
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 10 100 1000 10000 100000
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
CMRR (dB)
Frequency (Hz)
PSRR (dB)
Frequency (Hz)
Output Swing vs. Load
1.35
R L = 10k R L = 1k
Pulse Response vs. Common Mode Voltage
Output Voltage (0.27V/div)
0
R L = 75 R L = 100 R L = 200 R L = 75/100
-1.35 -2.0 0 2.0
Input Voltage (0.4V/div)
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
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8
Advance Data Sheet
Application Information
General Description The CLCx011 family of amplifiers are single supply, general purpose, voltage-feedback amplifiers. They are fabricated on a complimentary bipolar process, feature a rail-to-rail input and output, and are unity gain stable. Basic Operation Figures 1, 2, and 3 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations.
+Vs 6.8F
Power Dissipation Power dissipation should not be a factor when operating under the stated 10k ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it's intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150C. To calculate the junction temperature, the package thermal resistance value ThetaJA (JA) is used along with the total die power dissipation. TJunction = TAmbient + (JA x PD) Where TAmbient is the temperature of the working environment.
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Input
+ -
0.1F Output 0.1F RL Rf
G = 1 + (Rf/Rg)
In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Psupply = Vsupply x IRMS supply Vsupply = VS+ - VSPower delivered to a purely resistive load is:
Rg -Vs
6.8F
Figure 1. Typical Non-Inverting Gain Circuit
+Vs 6.8F
R1 Input Rg
+ -
0.1F Output 0.1F 6.8F -Vs RL Rf
G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg
Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as: RL || (Rf + Rg) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad
Output
Figure 2. Typical Inverting Gain Circuit
+Vs 6.8F
Input
+ -
0.1F
RL 0.1F 6.8F -Vs
Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / 2
Rev 0.0.1
G=1
Figure 3. Unity Gain Circuit
(c)2009 CADEKA Microcircuits LLC
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
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Advance Data Sheet
The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS x ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available.
and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 6.
Input + Rf Rg Rs CL RL
Output
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Figure 6. Addition of RS for Driving Capacitive Loads Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in approximately <1dB peaking in the frequency response. The Frequency Response vs. CL plot, on page 6, illustrates the response of the CLCx011.
CL (pF) 10pF 20pF 50pF RS () 0 0 0 100 -3dB BW (kHz) 2.2 2.4 2.5 2
Figure 4. Maximum Power Derating
100pF
Input Common Mode Voltage The common mode input range extends to 250mV below ground and to 250mV above Vs, in single supply operation. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. If the absolute maximum input voltage (700mV beyond either rail) is exceeded, externally limit the input current to 5mA as shown in Figure 5.
10k Input Output
Table 1: Recommended RS vs. CL For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx011 will typically recover in less than 50ns from an overdrive condition. Figure 7 shows the CLC1011 in an overdriven condition.
Figure 5. Circuit for Input Current Protection
Rev 0.0.1
Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response,
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10
Advance Data Sheet
Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 8-14. These evaluation boards are built for dual- supply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane.
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Figure 7. Overdrive Recovery Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CaDeKa has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: * Include 6.8F and 0.1F ceramic capacitors for power supply decoupling * Place the 6.8F capacitor within 0.75 inches of the power pin * Place the 0.1F capacitor within 0.1 inches of the power pin * Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance * Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # CEB011 CEB002 CEB006 CEB010 CEB018 CEB017 Products CLC1011 in SC70 CLC1011 in SOT23 CLC2011 in SOIC CLC2011 in MSOP CLC4011 in SOIC CLC4011 in TSSOP
Figure 8. CEB002 Schematic
Rev 0.0.1
Figure 9. CEB002 Top View
(c)2009 CADEKA Microcircuits LLC
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Advance Data Sheet
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Figure 10. CEB002 Bottom View
Figure 12. CEB006 Top View
Figure 13. CEB006 Bottom View
Figure 11. CEB006 Schematic
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
www.cadeka.com
12
Advance Data Sheet
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Figure 16. CEB018 Bottom View
Figure 14. CEB018 Schematic
Figure 15. CEB018 Top View
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
www.cadeka.com
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Advance Data Sheet
Mechanical Dimensions
SOT23-5 Package
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
SOIC-8 Package
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
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14
Advance Data Sheet
Mechanical Dimensions continued
SOIC-14 Package
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
Rev 0.0.1
(c)2009 CADEKA Microcircuits LLC
www.cadeka.com
15
Advance Data Sheet
Comlinear CLC1011, CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free)
CADEKA, the CADEKA logo design, COMLINEAR, the COMLINEAR logo design, and ARCTIC are trademarks or registered trademarks of CADEKA Microcircuits LLC. All other brand and product names may be trademarks of their respective companies. CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright (c)2009 by CADEKA Microcircuits LLC. All rights reserved.
Rev 0.0.1
A m p l i fy t h e H u m a n E x p e r i e n c e

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